IoT and wearable devices must simultaneously meet demands for miniaturization, long battery life, and increased functionality. As more sensors and wireless functions are added, allocating limited PCB space and battery capacity becomes increasingly challenging, and even small differences in power consumption can affect device operating time.
In low-power design, it is important to look beyond the MCU and wireless modules and consider the 32.768 kHz low-frequency sub-clock used for the RTC and sleep timer, which continues to operate even during deep sleep (standby). This low-frequency sub-clock not only maintains timekeeping through the real-time clock (RTC) but also serves as the reference for the system timer that controls wake-up timing from deep sleep. As a result, even a very small current draw can have a significant impact on battery life when sustained over long periods.
In IoT and wearable devices, functionality continues to expand, while the size of the enclosure, battery, and PCB cannot simply be increased to accommodate additional components. Achieving both long battery life and minIncreasing Power and PCB Space Constraints in IoT and Wearable Device Design iaturization therefore requires careful allocation of limited power and PCB space across the entire system.
This section examines the factors behind the increasingly stringent power consumption and PCB space constraints facing IoT and wearable device designers.
In IoT and wearable devices, as more features are added, designing for both miniaturization and long battery life becomes increasingly important. Adding sensors, Bluetooth Low Energy (BLE), LPWA, NFC, displays, and other functions not only increases power consumption but also reduces the available PCB space.
This is particularly important for smartwatches, healthcare devices, and various types of sensor devices, where wearability, portability, design, and battery life can directly influence product value. Rather than focusing solely on adding functionality, designers must also consider how to use limited power efficiently within a compact enclosure.
Achieving both miniaturization and long battery life therefore requires a system-level approach that considers not only power consumption during communication and processing, but also the low-frequency sub-clock circuitry that continues to operate during deep sleep.
In IoT and wearable devices, design challenges cannot be solved simply by increasing the size of the battery or PCB. Increasing battery capacity adds weight and thickness, which can negatively affect wearability, portability, and product design.
At the same time, reducing PCB size makes component placement, routing, heat dissipation, and noise mitigation more challenging, limiting overall design flexibility. To maintain performance within a confined space, it is important to optimize both power consumption and PCB footprint from the component selection stage.
The low-frequency sub-clock is no exception. Rather than evaluating a crystal resonator based solely on its size, designers should consider its compatibility with the IC as well as the current consumption of the entire oscillator circuit. Taking this system-level approach can help achieve more efficient low-power design.
In low-power design, attention tends to focus on components with relatively high power consumption, such as MCUs and wireless modules. However, because the low-frequency sub-clock circuit continues to operate during standby and sleep modes, it can have a direct impact on battery life.
This section examines the role of the low-frequency sub-clock circuit and explains how even a small amount of standby current can affect battery life over extended periods.
32.768 kHz tuning-fork crystal resonators are widely used as low-frequency sub-clock sources that provide the reference clock for real-time clocks (RTCs) and timers. A frequency of 32.768 kHz corresponds to 32,768 oscillations per second, or 2¹⁵ Hz, making it easy to divide down to 1 Hz and therefore well suited for timekeeping applications.
The low-frequency sub-clock also maintains timekeeping and internal schedules while the device's main functions are inactive during sleep mode, allowing the system to wake up at the required time. Unlike components such as MCUs and wireless modules, which operate only when needed, the low-frequency sub-clock often continues running for extended periods.
In wireless communication devices that operate intermittently, even slight clock errors can cause communication timing to drift. To prevent communication failures caused by this timing deviation, the system typically uses early wake-up, activating in advance to allow sufficient margin for clock error.
With a more accurate clock, this additional standby time can be minimized, helping to reduce unnecessary power consumption. For IoT and wearable devices designed for long battery life, the 32.768 kHz tuning-fork crystal resonator is therefore an important component that should be carefully considered from the early stages of system design.
Achieving long battery life requires evaluating current consumption not only during active operation but also during standby and sleep modes. Many IoT and wearable devices spend a significant portion of their operating time in standby, meaning that even very small amounts of standby current can accumulate over time and affect overall battery life.
The low-frequency sub-clock circuit continues to operate for functions such as timekeeping even while the device's main functions are inactive. Effective low-power design therefore requires evaluating current consumption across each operating mode, including standby, sleep, and backup modes, rather than focusing solely on active operation.
Evaluating the clock circuitry from the early stages of system design can help optimize overall power consumption and enable more efficient low-power design.
Tuning-fork crystal resonators used for low-frequency sub-clocks cannot be selected based on frequency and package size alone. To achieve both low power consumption and stable oscillation, factors such as load capacitance (CL), equivalent series resistance (ESR), and oscillation margin must be evaluated together with the operating conditions of the MCU’s low-frequency sub-clock oscillator circuit.
This section examines the key considerations for selecting a crystal resonator while taking into account compatibility and performance across the entire oscillator circuit.
Load capacitance (CL) is one of the key specifications to consider when evaluating the power consumption of an oscillator circuit. CL represents the circuit-side load capacitance for which the crystal resonator is designed to operate at its specified frequency.
In an actual oscillator circuit, the effective load capacitance is determined not only by external capacitors, but also by the IC pin capacitance and parasitic capacitance of the PCB. It is therefore important to design the circuit so that the effective load capacitance matches the specified CL of the crystal resonator.
Because the oscillator circuit charges and discharges capacitance during each oscillation cycle, CL also affects the drive energy required for oscillation. When switching to a crystal resonator with a different CL, designers should review the overall circuit conditions, taking into account not only the external capacitance but also frequency deviation and oscillation margin.
Low-CL crystal resonators can be an effective option for low-power design. In an oscillator circuit, a lower CL makes it possible to reduce the capacitance that must be charged and discharged. When properly matched with a compatible MCU low-frequency sub-clock oscillator circuit, this can help reduce current consumption.
In general, reducing load capacitance tends to make it more difficult to maintain frequency stability. However, through advanced processing technology, the TFX Series maintains high frequency accuracy even with low-CL configurations. This provides two power-saving benefits at the system level: minimizing the early wake-up time described above and reducing the current consumption of the oscillator circuit itself.
However, current consumption is not determined by CL alone. Multiple design factors must be considered, including the IC's drive capability settings, equivalent series resistance (ESR), and parasitic capacitance on the PCB.
When adopting a low-CL crystal resonator, designers should first confirm the IC manufacturer's recommended operating conditions, then evaluate current consumption and oscillation margin using actual hardware. Optimizing these factors across the entire oscillator circuit is essential for achieving effective low-power design.
When selecting a low-CL crystal resonator, it is also important to consider equivalent series resistance (ESR) and oscillation margin. As crystal resonators become smaller, ESR may increase, potentially affecting oscillation startup and stability.
If the ESR is not well matched to the circuit conditions, factors such as temperature variations and component tolerances may make stable oscillation more difficult to achieve. For this reason, designers should evaluate not only current consumption, but also startup behavior and oscillation margin. Selecting a product that is well suited to the circuit conditions requires careful consideration of both low CL and ESR.
Achieving stable oscillation requires proper matching between the crystal resonator and the MCU’s low-frequency sub-clock oscillator circuit. Oscillation stability is influenced by a combination of factors, including the IC’s oscillation drive capability, external capacitance, parasitic capacitance on the PCB, drive level, and operating temperature.
Even when load capacitance (CL) and equivalent series resistance (ESR) meet the datasheet requirements, actual PCB conditions can affect oscillation startup, current consumption, frequency deviation, and oscillation margin. When selecting a crystal resonator, designers should first confirm the oscillator requirements specified by the IC manufacturer, select an appropriate device, and then verify stable oscillation on the actual PCB.
In IoT and wearable devices that require high-density integration, the PCB footprint of peripheral components such as crystal resonators, as well as that of major ICs, can become an important design constraint. Because clock circuitry is affected by factors such as trace length and parasitic capacitance, components cannot simply be placed wherever space is available on the PCB.
This section examines how miniaturizing peripheral components can provide greater PCB layout flexibility and make it easier to achieve a practical, high-density board design.
In IoT and wearable devices, miniaturizing peripheral components is also an important factor in achieving high-density integration. In recent years, the number of components incorporated into these devices—including sensors, communication modules, antennas, and power circuitry—has continued to increase. As a result, the placement of not only major ICs but also peripheral components such as crystal resonators has become an important design consideration.
For clock circuitry in particular, it is generally recommended that the crystal resonator, IC, and external capacitors be placed close together, with trace lengths kept as short as possible. Because factors such as trace length, PCB parasitic capacitance, and GND layout can also affect oscillation characteristics, the size of the crystal resonator should be taken into consideration from the early stages of system design.
Ultra-compact crystal resonators are an effective option for increasing PCB layout flexibility. By minimizing their PCB footprint, they make it easier to allocate limited board space to sensors, communication circuitry, antennas, power circuitry, and other components.
Their compact size also makes it easier to place the crystal resonator close to the IC, helping to keep clock circuit trace lengths as short as possible. Ultra-compact packages can therefore provide greater layout flexibility while supporting high-density integration and further device miniaturization.
As tuning-fork crystal resonators become smaller, maintaining electrical characteristics such as equivalent series resistance (ESR) becomes increasingly challenging. River Eletec utilizes advanced microfabrication and sealing technologies tailored to each product structure to combine ultra-compact packages with electrical characteristics that facilitate stable oscillator circuit design.
This section introduces the technologies behind the miniaturization and reliability of River Eletec’s TFX Series.
As tuning-fork crystal resonators become smaller, equivalent series resistance (ESR) tends to increase, making it more challenging to maintain stable oscillation characteristics. River Eletec uses photolithography, a technology also employed in semiconductor manufacturing, together with advanced microfabrication technology to precisely form the crystal element, enabling both miniaturization and low-loss performance.
River Eletec also offers low-R1 (low-ESR) options, including the TFX-04C and TFX-03C, allowing designers to select a device according to the requirements of the oscillator circuit. These advanced processing technologies not only enable smaller crystal resonators but also help maintain the electrical characteristics required for reliable and stable oscillator circuit design.
Maintaining stable performance in an ultra-compact package also requires advanced sealing technology. River Eletec employs different sealing technologies according to the product structure, including metal diffusion sealing (MDS) for crystal packages made of quartz and electron-beam sealing for ceramic packages.
For example, the TFX-05X combines a quartz crystal package with MDS, providing not only a compact, lightweight design but also excellent weather resistance and shock resistance. The TFX-04, meanwhile, features a ceramic structure with electron-beam sealing and supports a wide operating temperature range.
River Eletec’s ability to offer different sealing structures according to the application and operating environment is another key strength of its technology.
River Eletec’s TFX Series includes a range of 32.768 kHz tuning-fork crystal resonators with different package sizes, load capacitance (CL), and equivalent series resistance (ESR) specifications. Selecting the most suitable device for an oscillator circuit depends not only on PCB footprint, but also on factors such as the oscillation drive capability of the MCU or RTC IC and the required oscillation margin.
This section reviews the product specifications relevant to the design considerations discussed in this article and outlines the key factors to consider when selecting the appropriate device.
The TFX Series offers a range of 32.768 kHz tuning-fork crystal resonators that can be selected according to PCB footprint and oscillator circuit requirements. Representative products relevant to the design considerations discussed in this article are shown below.
|
Product |
Package Size |
Load Capacitance (CL) |
Equivalent Series Resistance (ESR) |
|
|
1.2 × 1.0 × 0.35 mm Max. |
5.0 / 7.0 / 9.0 / 12.5 pF |
90 kΩ Max. |
Ultra-compact, low-profile 1210 package |
|
|
1.6 × 1.0 × 0.5 mm Max. |
5.0 / 7.0 / 9.0 / 12.5 pF |
90 kΩ Max. |
Standard 1610 package |
|
|
1.6 × 1.0 × 0.5 mm Max. |
5.0 / 7.0 / 9.0 / 12.5 pF |
60 kΩ Max. |
Low-R1 (low-ESR) type |
Even products with similar package sizes can differ in their electrical characteristics. Rather than selecting a device based solely on PCB footprint, it is important to choose a crystal resonator that is well matched to the requirements of the oscillator circuit.
Crystal resonators should not be selected based solely on specifications such as low CL or low R1 (low ESR). It is important to verify compatibility with the load capacitance, oscillation drive capability, and recommended ESR requirements of the MCU’s low-frequency sub-clock oscillator circuit, and then select a device that is well matched to the circuit conditions.
For example, a low-R1 (low-ESR) device such as the TFX-04C can be an effective option when the IC has limited drive capability (gm) or when additional oscillation margin is required. As the power consumption of the low-frequency sub-clock oscillator circuits in the latest MCUs continues to decrease, there is also growing demand for lower load capacitance (CL).
The low-CL products in the TFX Series combine reduced oscillator circuit power consumption with high-accuracy timekeeping, helping designers maximize the potential of the latest ultra-low-power ICs. For applications with even more demanding requirements, River Eletec can also provide customized solutions and evaluation support for CL values in the 4 pF range, which are not included in the standard lineup.
However, the optimal device will vary depending on mounting conditions and PCB layout, so selection should not be based on datasheet specifications alone. By evaluating oscillation startup, current consumption, and oscillation margin on actual hardware, designers can ensure proper matching between the crystal resonator and the oscillator circuit.
When selecting a crystal resonator for IoT and wearable devices, it is important not to focus on a single characteristic such as low load capacitance (CL) or an ultra-compact package. Instead, designers should comprehensively evaluate power consumption, oscillation stability, PCB layout requirements, and compatibility with the intended operating environment, and verify performance under actual PCB conditions.
This final section summarizes the key considerations to keep in mind throughout the selection process, from choosing the appropriate device to evaluating its performance on actual hardware.
When selecting a crystal resonator for IoT and wearable devices, it is important to evaluate multiple parameters together, including load capacitance (CL), equivalent series resistance (ESR), and drive level.
For example, load capacitance (CL) affects the external capacitance and current consumption of the oscillator circuit, so it must be properly matched to the specifications of the IC’s oscillator circuit.
ESR affects oscillation startup and oscillation margin, while drive level indicates whether the power dissipated in the crystal resonator remains within the allowable range. Frequency tolerance and operating temperature range must also be evaluated according to the requirements of the target application.
Rather than prioritizing power consumption alone, selecting components with the appropriate balance between low power consumption and oscillation stability is essential for designing products that operate reliably over extended periods.
A crystal resonator cannot be evaluated solely on whether it meets the specifications listed in the datasheet. This is because the oscillator circuit is affected by actual PCB conditions, including external capacitance, parasitic capacitance, trace length, temperature variations, and component tolerances.
In particular, increasing the distance between the crystal resonator and the IC can increase susceptibility to parasitic capacitance and noise, potentially reducing oscillation stability. For this reason, designers should verify oscillation startup, current consumption, and oscillation margin on actual hardware and comprehensively evaluate the relevant design conditions.
Based on the evaluation results, the circuit and PCB layout can be reviewed and optimized as necessary. Utilizing the manufacturer’s design support when needed can also help achieve a more stable and reliable oscillator circuit.
The size of a crystal resonator should be selected with consideration not only for current product requirements but also for future expandability. In IoT and wearable devices, sensors and communication functions are often added as products evolve.
Adopting an ultra-compact package from the early stages of design can help preserve valuable PCB space, providing greater flexibility for future component additions and routing changes. A smaller crystal resonator is also easier to place close to the IC, providing greater PCB layout flexibility for the clock circuitry.
Achieving both miniaturization and long battery life in IoT and wearable devices requires careful allocation of limited power and PCB space from the early stages of system design. The low-frequency sub-clock circuit used for the RTC and sleep timer, which continues to operate during deep sleep, is an important factor that should not be overlooked when considering overall power efficiency.
When selecting a tuning-fork crystal resonator, designers must consider more than frequency and package size. Load capacitance (CL), equivalent series resistance (ESR), drive level, compatibility with the IC, and actual mounting conditions should all be evaluated together.
River Eletec’s TFX Series offers a range of devices designed to meet different oscillator circuit requirements, including ultra-compact packages, low-CL, and low-R1 (low-ESR) options. In addition to its standard lineup, River Eletec also provides customized solutions and evaluation support for ultra-low CL values in the 4 pF range, helping designers pursue even lower power consumption.
If you are looking to reduce power consumption during deep sleep or need assistance selecting the appropriate crystal resonator for your design, please feel free to contact River Eletec.
River Eletec can support the evaluation of CL, ESR, oscillation margin, and compatibility with your MCU or RTC IC.